1. Field
Embodiments relate to a semiconductor wafer, a semiconductor device using the same, and a method and apparatus for producing the same.
2. Description of the Related Art
Advances in semiconductor technologies, e.g., vertical integration of devices as multi-chip packages (3-dimensional packages), have been leading to requirements for thinner device substrates. However, processing, e.g., thinning, a semiconductor wafer to provide a thin device substrate may eliminate beneficial internal gettering sites (also referred to as intrinsic gettering sites) in the wafer. Further, back side polishing may be required to avoid generating structural defects in a very thin wafer, e.g., in a wafer having a thickness of about 90 μm for a 300 mm wafer and about 50 μm for a 200 mm wafer, as compared to back side grinding that may be used to provide a somewhat thicker wafer. However, back side polishing does not generally provide the rough surface-provided by back side grinding, resulting in a loss of gettering sites provided by the rough surface. These issues may be particularly problematic when devices formed on the substrate use transition metal chemistries, e.g., copper for interconnects, cobalt for gate materials, etc.